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Microchip Technology /ATSAME70J21B /USART0 /US_CSR_SPI_MODE

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Interpret as US_CSR_SPI_MODE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RXRDY)RXRDY 0 (TXRDY)TXRDY 0 (OVRE)OVRE 0 (TXEMPTY)TXEMPTY 0 (UNRE)UNRE 0 (NSSE)NSSE 0 (NSS)NSS

Description

Channel Status Register

Fields

RXRDY

Receiver Ready (cleared by reading US_RHR)
TXRDY

Transmitter Ready (cleared by writing US_THR)
OVRE

Overrun Error (cleared by writing a one to bit US_CR.RSTSTA)
TXEMPTY

Transmitter Empty (cleared by writing US_THR)
UNRE

SPI Underrun Error
NSSE

NSS Line (Driving CTS Pin) Rising or Falling Edge Event
NSS

Image of NSS Line

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data